There is a clear use case for roundTiesToOdd (correctly rounding
calculations for later conversion to a lower precision), this is
why Power implements it for its 128-bit HW.
Why didn't make this into IEEE 754-2019? Will it (likely) be
in a future revision?
Terje, maybe you can shed some light on this.
Thomas Koenig wrote:
There is a clear use case for roundTiesToOdd (correctly rounding
calculations for later conversion to a lower precision), this is
why Power implements it for its 128-bit HW.
Why didn't make this into IEEE 754-2019? Will it (likely) be
in a future revision?
Terje, maybe you can shed some light on this.
The WG discussions are private,
but I can confirm that rounding modes
are on the table.
There is a clear use case for roundTiesToOdd (correctly rounding
calculations for later conversion to a lower precision), this is why
Power implements it for its 128-bit HW.
But I think I'd have to learn more about numerical analysis to make an intelligent comment on this matter.
So if you could switch between these two rounding modes, and you did
a calculation both ways, and got wildly different results... this
would let you know that the problem, or your algorithm for dealing
with it, is so wildly ill-conditioned that your results in either
case are not valid.
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